Search - verilog alu

[Other resource] verilog

Description: 8bit alu use verilog hdl
Platform: | Size: 8752 | Author: 周微微 | Hits:

[Other resource] ALU

Description: 用verilog编写的32位alu部件，用于cpu制作
Platform: | Size: 3377 | Author: 胡豫陇 | Hits:

[Other resource] ALU

Description: 用verilog编写的4位ALU，由算术运算模块、逻辑运算模块、选择模块组成
Platform: | Size: 2793 | Author: 姚伟 | Hits:

[Other resource] ALU

Description: 用VERILOG实现ALU，实现各种算术运算，逻辑运算，移位运算等
Platform: | Size: 1725616 | Author: 刘自强 | Hits:

[Other resource] alu-div

Description: 用verilog HDL代码编写的快速除法器，比较有用
Platform: | Size: 15134 | Author: 徐芬 | Hits:

[Other resource] alu

Description: verilog编写的alu模块-Verilog modules prepared by the ALU
Platform: | Size: 1393 | Author: 刘陆陆 | Hits:

[Other resource] verilog实现ALU的源代码

Description: verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!
Platform: | Size: 1382 | Author: 飞扬 | Hits:

[VHDL-FPGA-Verilog] alu_inverter

Description: 4bit ALU 利用vhdl语言编写的4位ALU 开发环境是在windows下-Band ALU using VHDL language prepared by the four ALU is a development environment under Windows
Platform: | Size: 18432 | Author: bob | Hits:

[VHDL-FPGA-Verilog] Example-2-5

Description: 这些是verilog编程实例5,仅供参考-These are examples of Verilog Programming 5 for reference
Platform: | Size: 74752 | Author: john | Hits:

Description: ALU算术逻辑单元的简单实现,利用VHDL语言编写,可进行加法,减法,以及位的左右移动,只需一个时钟脉冲-ALU arithmetic logic unit to achieve a simple, using VHDL language, can be additive, subtractive, and the place and move around only one clock pulse
Platform: | Size: 103424 | Author: Jake | Hits:

[VHDL-FPGA-Verilog] 8051core-Verilog

Description: 利用verlilog hdl语言编程，完成了8051内核，非常值得学习硬件描述语言的人看看！-Verlilog hdl programming language to use to complete the 8051 core, very much worth learning hardware description language of the people to see!
Platform: | Size: 53248 | Author: 小方 | Hits:

[VHDL-FPGA-Verilog] alu181

Description: alu运算器vhdl代码，介绍了16中运算方法，可用于cpu的设计中-alu calculator VHDL code, introduction of 16 in computing methods, can be used for the design of cpu
Platform: | Size: 1024 | Author: 赵心 | Hits:

[VHDL-FPGA-Verilog] CPU

Description: 使用verilog作为CPU设计语言实现单数据通路五级流水线的CPU。具有32个通用寄存器、一个程序计数器PC、一个标志寄存器FLAG，一个堆栈寄存器STACK。存储器寻址粒度为字节。数据存储以32位字对准。采用32位定长指令格式，采用Load/Store结构，ALU指令采用三地址格式。支持有符号和无符号整数加、减、乘、除运算，并支持浮点数加、减、乘、除四种运算，支持与、或、异或、非4种逻辑运算，支持逻辑左移、逻辑右移、算术右移、循环右移4种移位运算，支持Load/Store操作，支持地址/立即数加载操作，支持无条件转移和为0转移、非0转移、无符号>转移、无符号<转移、有符号>转移、有符号<转移等条件转移。
Platform: | Size: 43008 | Author: haotianr | Hits:

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[Other resource] verilog

[Other resource] ALU

[Other resource] ALU

[Other resource] ALU

[Other resource] alu-div

[Other resource] alu

[Other resource] verilog实现ALU的源代码

[VHDL-FPGA-Verilog] alu_inverter

[VHDL-FPGA-Verilog] Example-2-5

[VHDL-FPGA-Verilog] Quaalu

[VHDL-FPGA-Verilog] 8051core-Verilog

[VHDL-FPGA-Verilog] alu181

[VHDL-FPGA-Verilog] CPU

[VHDL-FPGA-Verilog] 8risc

[VHDL-FPGA-Verilog] myAddSub

[VHDL-FPGA-Verilog] MIPS-ARM-ALU

[VHDL-FPGA-Verilog] ALU

[VHDL-FPGA-Verilog] ALU

[VHDL-FPGA-Verilog] ALU

[VHDL-FPGA-Verilog] alu

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